⚠️ This project is still in development. The HDL core, C golden emulator, and game subsystem are present but not yet fully verified end-to-end. SeeISSUES.mdfor the current known issues and status.
An almost from-scratch, simulation-first implementation of the Intel 8085 microprocessor in SystemVerilog, built to learn HDL by building something real and to run actual 8085 programs — including small games (Pong, Snake) on a memory-mapped video + keyboard subsystem.
It is verified by co-simulation: an independent C golden-model emulator
(sw/emu.c) and the SystemVerilog model (rtl/) must produce bit-identical
console output on the public-domain 8080/8085 CPU exerciser ROMs and on our own
programs.
| Path | Purpose |
|---|---|
rtl/ |
SystemVerilog core: alu, memory, cpu, top, video, input |
sim/ |
Verilator C++ harness (sim_main.cpp) |
sw/ |
emu.c — independent C golden reference model |
asm/ |
8085 assembly programs (assembled with my1asm85) |
tools/ |
my1asm85 assembler, superzazu_8080 oracle (reference) |
tests/ |
exerciser ROMs (TST8080, 8080PRE, CPUTEST, 8080EXM, 8085EXER) |
docs/ |
architecture, test plan, memory map |
# build the SystemVerilog model + C emulator
make
# hello world: assemble, run both models, diff console output
make hello
# exerciser co-simulation (C model vs HDL, must match)
make tst8080 8080pre cputest
# a tiny game: Pong (renders frames to obj/frame_NNNN.ppm)
make pongThe 8085 sees a single linear 64 KB address space plus memory-mapped I/O:
| Range | Use |
|---|---|
0x0000–0x7FFF |
RAM / program / stack |
0x8000–0x80FF |
VRAM: 64×32 monochrome framebuffer (1 bpp) |
0xF000–0xFFFF |
general RAM / stack top |
IN 0x10 |
keyboard: bits {up,down,left,right,fire} |
OUT 0x20 |
vsync: harness snapshots VRAM to a frame |
OUT 0x00 |
halt |
OUT 0x01 |
write accumulator to console (CP/M BDOS) |
CALL 5 |
BDOS entry (C=2 print E, C=9 print string) |
See docs/architecture.md and
docs/tests.md for details.
- Single-step, hardwired-FSM 8085 core (full 8080 ISA + 8085 extras)
- C golden emulator + exerciser co-simulation (TST8080 / 8080PRE / CPUTEST)
- Memory-mapped video + keyboard subsystem
- Pong demo running in Verilator
- Snake demo, sound, FPGA/VGA backend
MIT — see LICENSE.